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期刊文章:?

[1] Fu, Rongliang, Junying Huang, Haibin Wu, Xiaochun Ye, Dongrui Fan, and Tsung-Yi Ho. "JBNN: A Hardware Design for Binarized Neural Networks Using Single-Flux-Quantum Circuits." IEEE Transactions on Computers 71, no. 12 (2022): 3203-3214.?

[2] Huang, Junying, Rongliang Fu, Xiaochun Ye, and Dongrui Fan. "A survey on superconducting computing technology: circuits, architectures and design tools." CCF Transactions on High Performance Computing 4, no. 1 (2022): 1-22.?

[3] Fu, Rong-Liang, Guang-Ming Tang, Junying Huang, and Zhi-Min Zhang. "An Automatic placement algorithm for superconducting rapid single-flux-quantum logic circuits." IEEE Transactions on Applied Superconductivity 31, no. 5 (2021): 1-5.?

會(huì)議文章：?

[1] Rongliang Fu, Junying Huang, Mengmeng Wang, Yoshikawa Nobuyuki, Bei Yu, Tsung-Yi Ho, Olivia Chen. "BOMIG: A Majority Logic Synthesis Framework for AQFP Logic." Design, Automation and Test in Europe (DATE) 2023 (accepted).?

[2] Fu, Rongliang, Junying Huang, and Zhi-Min Zhang. "Equivalence Checking for Superconducting RSFQ Logic Circuits." In Proceedings of the 2021 on Great Lakes Symposium on VLSI, pp. 51-56. 2021.?

[3] Fu, Rongliang, Zhi-Min Zhang, Guang-Ming Tang, Junying Huang, Xiao-Chun Ye, Dong-Rui Fan, and Ning-Hui Sun. "Design Automation Methodology from RTL to Gate-level Netlist and Schematic for RSFQ Logic Circuits." In Proceedings of the 2020 on Great Lakes Symposium on VLSI, pp. 145-150. 2020.?

[4] Huang, Junying, Jing Ye, Xiaochun Ye, Da Wang, Dongrui Fan, Huawei Li, Xiaowei Li, and Zhimin Zhang. "Instruction Vulnerability Test and Code Optimization Against DVFS Attack." In 2019 IEEE International Test Conference in Asia (ITC-Asia), pp. 49-54. IEEE, 2019.?

[5] Zhang, Kuozhong, Junying Huang, Jing Ye, Xiaochun Ye, Da Wang, Dongrui Fan, Huawei Li, Xiaowei Li, and Zhimin Zhang. "iATPG: Instruction-level Automatic Test Program Generation for Vulnerabilities under DVFS attack." In 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS), pp. 287-292. IEEE, 2019.?

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專利：?

[1]黃俊英;付榮亮;張志敏，一種超導(dǎo)二值神經(jīng)網(wǎng)絡(luò)加速方法及加速器，申請(qǐng)?zhí)枺?span lang="EN-US">CN202210513312.7.?

[2]黃俊英;付榮亮;張闊中;葉笑春;張志敏;范東睿，生成面向超導(dǎo)RSFQ電路的多扇出時(shí)鐘信號(hào)的方法，申請(qǐng)?zhí)枺?span lang="EN-US">CN202110446390.5?

[3]黃俊英;張闊中;葉笑春;張志敏;范東睿，用于雙時(shí)鐘架構(gòu)的超導(dǎo)RSFQ電路布局方法，申請(qǐng)?zhí)枺?span lang="EN-US">CN202110442343.3?

[4]黃俊英;付榮亮;張闊中;葉笑春;張志敏;范東睿，生成面向超導(dǎo)RSFQ電路的?

多扇出時(shí)鐘信號(hào)的方法，申請(qǐng)?zhí)枺?span lang="EN-US">CN202010703091.0?

[5]張闊中;黃俊英;張志敏;唐光明，基于超導(dǎo)異或門生成時(shí)鐘信號(hào)的方法以及時(shí)鐘發(fā)生器，申請(qǐng)?zhí)枺?span lang="EN-US">CN202210048631.5?

[6]張闊中;黃俊英;張志敏;唐光明，超導(dǎo)譯碼器裝置，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202110689803.2?

[7]王中旗;黃俊英;張志敏;葉笑春;范東睿，跨平臺(tái)光纖傳輸系統(tǒng)，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202210764423.5?

[8]王中旗;黃俊英;張志敏;葉笑春;范東睿，板間通信接口系統(tǒng)，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202210764461.0?

[9]王中旗;黃俊英;張志敏;葉笑春;范東睿，光纖通信轉(zhuǎn)接系統(tǒng)，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202210764499.8?

[10]付榮亮;黃俊英;張闊中;唐光明;葉笑春;范東睿;張志敏，一種生成面向超導(dǎo)RSFQ電路的多扇出信號(hào)的方法，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202010709748.4?

[11]張闊中;黃俊英;張志敏;唐光明，超導(dǎo)寄存器堆裝置及其控制方法，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202110439614.X?

[12]王中旗;張志軒;黃俊英;張志敏;葉笑春;范東睿，針對(duì)低溫多芯片計(jì)算系統(tǒng)的模擬方法及其系統(tǒng)，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202210880357.8?

[13]張闊中;張志敏;唐光明;黃俊英，超導(dǎo)脈沖計(jì)數(shù)器，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202210598684.4?

[14]張志敏;唐光明;張闊中;黃俊英;付榮亮;葉笑春;范東睿，一種超導(dǎo)流水線電路及處理器，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202010875646.X?

[15]張志敏;唐光明;張闊中;黃俊英;付榮亮;葉笑春;范東睿，一種超導(dǎo)并行寄存器堆裝置，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202010876462.5?

[16]張闊中;張志敏;唐光明;黃俊英;付榮亮;葉笑春;范東睿，超導(dǎo)處理器及其輸入輸出控制模塊，申請(qǐng)?zhí)枺?span lang="EN-US"> CN202110266205.4?